A good wafer does not automatically mean a correct design
“Yield” is often discussed as if it were a single percentage that tells you whether a semiconductor run succeeded. For custom silicon, that is too simple. A wafer can be manufactured correctly while a customer circuit contains a design mistake, and a customer circuit can fail in one location without proving that the entire wafer process is unhealthy.
To understand what happened, two separate questions have to be answered.
1. Is the manufacturing process healthy?
The first question belongs to the manufacturer: did the wafer go through the process in a way that produced the expected devices, contacts and interconnect?
xSilica evaluates this using dedicated test and control structures distributed across the wafer. These structures are designed to isolate manufacturing behavior from the complexity of a customer's full circuit.
Depending on the stage of process maturity, the monitor set can include simple devices and structures that reveal whether critical elements of the process are behaving as expected: transistor characteristics, resistive structures, contacts, interconnect continuity and other process-sensitive features.
Measurements from those structures are combined with manufacturing records and physical inspection to determine whether the wafer stayed inside the defined process envelope.
This is the semiconductor equivalent of instrumenting the manufacturing process itself.
2. Does the customer's circuit work?
The second question belongs to the design. A circuit can be fabricated exactly as drawn and still fail to perform its intended function.
Possible causes include an incorrect schematic, a logic error, an unstable bias condition, insufficient margin, an interface assumption that was wrong or behavior that was not captured adequately by simulation.
Those are real failures, but they are not automatically manufacturing failures.
A process deviation can, of course, also cause a correctly designed circuit to fail. Without independent process monitors, a failed customer design can leave everyone guessing whether the problem came from the circuit or the wafer.
Process data makes iteration more useful
Rapid iteration only creates value if a revision teaches you something trustworthy. Suppose an amplifier produces less gain than expected. If the wafer's transistor monitors also show that device parameters shifted, the next action may be a process correction or a model update. If the process monitors look healthy, attention can move toward the amplifier architecture or its assumptions. The same logic applies to digital behavior, leakage, contacts and interconnect.
The objective is not merely to label a die “pass” or “fail”, but to produce enough context to understand why.
Responsibility follows the boundary
xSilica's manufacturing responsibility is to deliver silicon within the agreed manufacturing specification and to use process-control information to determine whether the fabrication run was healthy.
The customer remains responsible for the functionality of the submitted design unless functional verification, characterization or test has been included separately in the service.
That boundary matters because the two problems require different evidence. Manufacturing yield is established from process data and conformance to the agreed manufacturing specification; design functionality is established by testing the actual circuit against what it was intended to do.
A healthy wafer is necessary for a working chip, but it is not proof that the design is correct.