Rapid CMOS · Eindhoven, NL

Custom silicon, made accessible.

Design with familiar tools. Iterate in weeks.
Manufacture from a handful of dies to a full wafer.

~2 weeks
Target manufacturing cycle
~€25k
Target price for a dedicated wafer

or much less for a couple dies through FlexMPW

xSilica Rapid CMOS is currently in technical validation. Pilot access is available for selected projects.

Silicon for the electronics between sensors and software.

Not every chip needs billions of transistors.

Many products need sensing, interfacing, timing, logic and control. For these functions, customization and development speed can matter more than leading-edge transistor density.

01

Industrial Control

Sensor interfaces, control, mixed-signal integration, timing and specialized logic for industrial electronics.

Explore Industrial Control
02

Aerospace & Defense

Low-volume, specialized and long-lifecycle electronics where development speed, supply-chain control and sovereignty matter.

Explore Aerospace & Defense
03

Automotive

Rapid custom silicon for functional prototypes, architecture validation and early engineering samples before production-qualified silicon is required.

Explore Automotive Development
04

Data Center Infrastructure

Monitoring, management and control silicon for the infrastructure around compute.

Explore Data Center Infrastructure
05

Home & IoT

Application-specific electronics for connected products, appliances and embedded systems.

Explore Home & IoT
06

Medical & Scientific

Specialized mixed-signal, control and interface silicon for medical devices, laboratory equipment and scientific instrumentation.

Explore Medical & Scientific

The problem

Custom silicon usually enters too late.

There is a large class of product companies that could benefit from application-specific silicon but never starts an ASIC programme.

The reason is not necessarily volume. Conventional custom silicon requires several commitments at the same time:

Capital

Enough budget to justify a substantial development programme before the first physical result exists.

Expertise

Specialist IC design knowledge, semiconductor tooling and manufacturing experience that many otherwise capable electronics teams do not have internally.

Time

Months between committing a design and learning what the physical silicon actually does.

Requirements maturity

Enough confidence in the product architecture to justify freezing important decisions before fabrication begins.

Together, those requirements push custom silicon towards the end of product development.

Many teams stay with microcontrollers, FPGAs and discrete components instead, even where a custom IC would produce a better product.

xSilica exists to move custom silicon earlier into that learning curve.

Design it. Simulate it. Manufacture it. Measure it. Change it. Then do it again.

Two ways to manufacture

Dedicated Wafer

Your project. Your wafer.

A complete xSilica CMOS manufacturing run dedicated to one project.

Dedicated Wafer is intended for larger designs, higher prototype quantities and projects where manufacturing should begin immediately after technical acceptance.

You receive the usable dies produced from your wafer, subject to manufacturing yield.

Configure a Run

FlexMPW

Share the wafer, not the schedule.

FlexMPW continuously combines compatible projects onto shared wafers.

There is no quarterly tape-out date to wait for.

Submit the quantity you need, specify how much flexibility you have, and xSilica continuously calculates a manufacturable wafer from the projects currently available.

When a viable wafer is complete, the run closes and manufacturing begins.

Explore FlexMPW

Illustrative FlexMPW run

FLEX-CMOS-5UM-3V3IO-4M-2609.2

Rapid CMOS · 4-metal · 100 mm

68% allocated
Projects
7 committed
Status
Forming — pilot run
Selected
Hover the wafer
Committed Expansion Free Process control

Platform preview. Run data shown for illustrative purposes only.

Designed as one system

Accessibility has to be designed into the whole system.

Traditional semiconductor development separates process technology, chip design and manufacturing equipment.

xSilica develops all three around one objective: make custom silicon practical to design, iterate and manufacture.

01

Process

A proprietary CMOS recipe designed for iteration.

xSilica develops and controls the fabrication recipe underlying Rapid CMOS: the materials, chemistry, process sequence and operating windows required to reproducibly turn silicon wafers into functional transistors and interconnect.

The objective is not maximum transistor density.

Every process decision is evaluated against manufacturability, repeatability, equipment complexity and iteration speed.

The result is a deliberately constrained mature-node CMOS platform for useful digital, analog and mixed-signal electronics.

02

Design

A design environment built around the process.

xSilica is developing its design flow around workflows electronics engineers already understand: schematic capture, reusable components, SPICE simulation, VHDL, logic synthesis and automated design checks.

Process constraints are embedded into the toolchain rather than left for the designer to interpret.

The objective is simple: valid designs should be manufacturable by construction.

03

Manufacturing

Lower fab complexity changes the economics of silicon.

Conventional semiconductor fabs contain extremely expensive equipment and infrastructure. Those assets need to remain highly utilized, which naturally favors large volumes, batching and long production queues.

xSilica takes the opposite starting point. By simplifying the semiconductor process, we can also simplify the equipment required to manufacture it.

Compact, purpose-built manufacturing equipment reduces the capital tied up in each unit of production capacity. That means less production has to be aggregated before manufacturing becomes economical.

Simpler process. Simpler equipment. Lower fab CAPEX. Economical small runs.

That is what makes rapid Dedicated Wafer manufacturing and continuously filling FlexMPW runs possible.

One constrained platform.

Easier design.
Shorter iteration cycles.
Lower commitment per experiment.

What would you build if custom silicon took weeks instead of months?